Semiconductor devices like a MOSFET (=Metal Oxide Semiconductor Field Effect Transistor) device or an IC (=Integrated Circuit) comprising such a transistor are required for many applications in silicon technology such as logic transistors and memory transistors, particularly manufactured in CMOS technology. However, other semiconductor devices may be employed in integrated circuits as well.
Saarnilehto, E., Sonsky, J., Meunier-Beillard, P., Neuilly, F., “Local Buried oxide technology for HV transistors integrated in CMOS”, 19th International Symposium on Power Semiconductor Devices and ICs, 2007, pp. 81 to 84 discloses that automotive applications require full dielectric isolation of the high voltage and analog components. Such isolation is typically realized by BCD technologies built on SOI (=Silicon on insulator). The drawbacks of using SOI wafers, i.e. deviation from the baseline bulk CMOS and increased overall cost, can be addressed by manufacturing local SOI islands in the standard bulk wafer. A method to manufacture a local buried oxide using LoBOX technology and its integration to baseline CMOS is disclosed. The LoBOX technology is based on a sacrificial SiGe layer buried in bulk substrate and subsequently replaced with oxide. It is a general isolation solution that allows flexible local SOI and local BOX thickness. The LoBOX technology is integrated in a 130 nm bulk CMOS process to demonstrate its feasibility. The manufactured HV transistors isolated with local BOX, feature almost identical performance as those manufactured on commercial SOI wafers.
US 2005/0098094 discloses a partially insulated field effect transistor and a method of fabricating the same. A semiconductor substrate is formed by sequentially stacking a bottom semiconductor layer, a sacrificial layer, and a top semiconductor layer. The sacrificial layer may be removed to form a buried gap region between the bottom semiconductor layer and the top semiconductor layer. Then, a transistor may be formed on the semiconductor substrate. The sacrificial layer may be a crystalline semiconductor formed by an epitaxial growth technology.
US 2002/0001965 discloses that, using sub-micron technology, silicon on insulator (SOI) rows and islands are formed in a silicon substrate. Trenches are directionally-etched in the silicon substrate, leaving rows of silicon between the trenches. Silicon nitride is then deposited over the trenches, extending partly down the sides of the trenches. An isotropic chemical etch is then used to partially undercut narrow rows of silicon in the substrate. A subsequent oxidation step fully undercuts the rows of silicon, isolating the silicon rows from adjacent active areas. Devices, such as transistors for CMOS and DRAMs, are then formed in active areas, wherein the active areas are defined on the silicon rows by LOCal Oxidation of Silicon (LOCOS).
However, conventional manufacture procedures for semiconductor devices may be cumbersome and expensive.